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InstanceVisitorPass does not allow passing in functors that have access to the class object itself.
#1017
opened Jul 26, 2021 by
rdaly525
verilog ND-array generation should be packed arrays instead of unpacked arrays.
#974
opened Oct 27, 2020 by
rdaly525
Why is IEEE compliance for CW floating point add/mul set to 0?
#972
opened Oct 26, 2020 by
jack-melchert
Add a Custom Name for CoreIR Generator When Generate Verilog
Feature Request
#941
opened Aug 17, 2020 by
joyliu37
Loading the same library twice creates two distinct namespace objects
#929
opened Aug 6, 2020 by
rdaly525
Add metadata field for names that shouldn't be inlined in the verilog code generation
#884
opened May 1, 2020 by
leonardt
Add pre-verilog pass to uniquify instance names to prevent aliasing with module port names.
#859
opened Mar 31, 2020 by
rdaly525
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